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How do you design a voltage-controlled oscillator?

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A voltage-controlled oscillator (VCO) changes frequency with a control voltage, usually by tuning a varactor in an LC tank: f = 1/(2π√(L·C(V))). Its tuning sensitivity KVCO (Hz/V or rad/s/V) enters the PLL loop gain. Wide tuning range with low KVCO is achieved with switched capacitor banks plus a fine varactor.[1][2]

What trade-offs govern VCO design?

Which topologies are used?

Cross-coupled NMOS or complementary (NMOS+PMOS) LC VCOs in ICs; Colpitts and Clapp in discrete designs; class-C and class-F VCOs for better phase noise efficiency; YIG-tuned oscillators for multi-octave instrument sources.[1]

How is a VCO characterized?

Frequency versus tuning voltage (and KVCO as its slope), phase noise at standard offsets, output power and harmonics, pushing, pulling, and figure of merit FOM = L(Δf) − 20·log10(f0/Δf) + 10·log10(PDC/1 mW) (lower is better).[1]

Frequently asked questions

What is KVCO?

The VCO's tuning slope, in Hz per volt.

Why use capacitor banks?

They give coarse tuning steps so the varactor covers only a small range, reducing KVCO.

What limits VCO phase noise?

Tank Q, signal swing, active device noise and noise up-conversion.

References

Online sources accessed October 21, 2026; printed works cited by edition. See all sources.

  1. “RF Microelectronics, 2nd ed.”. B. Razavi, Prentice Hall. 2012.
  2. “The Design of CMOS Radio-Frequency Integrated Circuits, 2nd ed.”. T. H. Lee, Cambridge University Press. 2004.