How do frequency multipliers and dividers work?
A frequency multiplier drives a nonlinear device (diode, transistor) to generate harmonics and filters the desired one; a divider produces a sub-multiple of the input frequency, digitally (flip-flops, prescalers) or with regenerative (Miller) or injection-locked circuits. Ideal multiplication by N raises phase noise by 20·log10(N); ideal division lowers it by the same amount.[1][2]
What multiplier types are used?
- Doublers: balanced diode or push-push transistor doublers suppress the fundamental and odd harmonics.
- Triplers: anti-parallel diodes generate odd harmonics.
- Step-recovery and comb generators: produce many harmonics for references and calibration.
- Active multipliers in mmWave transceivers that use a lower-frequency PLL.
What are the trade-offs?
Conversion efficiency falls with higher multiplication factors; unwanted harmonics must be filtered; amplitude and AM noise convert depending on saturation. Multiplying chains are common in mmWave and sub-THz sources and in LO distribution.
Where are dividers used?
PLL feedback paths, quadrature LO generation (divide-by-2 gives I/Q outputs), and clock distribution. Divider noise floors limit how much phase-noise improvement division provides.
Frequently asked questions
Does a doubler double phase noise?
It raises phase noise by 6 dB (20·log10 2).
Why use a push-push oscillator?
It extracts the second harmonic from a balanced oscillator, reaching higher frequencies.
Can dividers create spurs?
Yes, from supply coupling and mismatches.
See also
References
Online sources accessed October 21, 2026; printed works cited by edition. See all sources.
- “Phase-Locked Loops: Design, Simulation, and Applications, 6th ed.”. R. E. Best, McGraw-Hill. 2007.
- “Frequency Synthesis by Phase Lock, 2nd ed.”. W. F. Egan, Wiley. 2000.